/*
 * mx51_tzic.h
 *
 *  Created on: Jun 6, 2013
 *      Author: michal
 */

#ifndef MX51_TZIC_H_
#define MX51_TZIC_H_

#define MX51_IRQ_ESDHC1         1
#define MX51_IRQ_ESDHC2         2
#define MX51_IRQ_ESDHC3         3
#define MX51_IRQ_ESDHC4         4
#define MX51_IRQ_DAP            5
#define MX51_IRQ_SDMA           6
#define MX51_IRQ_IOMUX          7
#define MX51_IRQ_NFC            8
#define MX51_IRQ_VPU            9
#define MX51_IRQ_IPUEX_ERR      10
#define MX51_IRQ_IPUEX_SYNC     11
#define MX51_IRQ_GPU3D          12
#define MX51_IRQ_USBOH3_HOST1   14
#define MX51_IRQ_EMI            15
#define MX51_IRQ_USBOH3_HOST2   16
#define MX51_IRQ_USBOH3_HOST3   17
#define MX51_IRQ_USBOH3_OTG     18
#define MX51_IRQ_SAHARA_TZ      19
#define MX51_IRQ_SAHARA         20
#define MX51_IRQ_SCC_HI_PRI     21
#define MX51_IRQ_SCC_TZ         22
#define MX51_IRQ_SCC            23
#define MX51_IRQ_SRTC           24
#define MX51_IRQ_SRTC_TZ        25
#define MX51_IRQ_RTIC_TZ        26
#define MX51_IRQ_CSU            27
#define MX51_IRQ_SSI1           29
#define MX51_IRQ_SSI2           30
#define MX51_IRQ_UART_1         31
#define MX51_IRQ_UART_2         32
#define MX51_IRQ_UART_3         33
#define MX51_IRQ_ECSPI_1        36
#define MX51_IRQ_ECSPI_2        37
#define MX51_IRQ_CSPI           38
#define MX51_IRQ_GPT            39
#define MX51_IRQ_EPIT_1         40
#define MX51_IRQ_EPIT_2         41
#define MX51_IRQ_GPIO1_INT7     42
#define MX51_IRQ_GPIO1_INT6     43
#define MX51_IRQ_GPIO1_INT5     44
#define MX51_IRQ_GPIO1_INT4     45
#define MX51_IRQ_GPIO1_INT3     46
#define MX51_IRQ_GPIO1_INT2     47
#define MX51_IRQ_GPIO1_INT1     48
#define MX51_IRQ_GPIO1_INT0     49
#define MX51_IRQ_GPIO1_INT0_15  50
#define MX51_IRQ_GPIO1_INT16_31 51
#define MX51_IRQ_GPIO2_INT0_15  52
#define MX51_IRQ_GPIO2_INT16_31 53
#define MX51_IRQ_GPIO3_INT0_15  54
#define MX51_IRQ_GPIO3_INT16_31 55
#define MX51_IRQ_GPIO4_INT0_15  56
#define MX51_IRQ_GPIO4_INT16_31 57
#define MX51_IRQ_WDOG1          58
#define MX51_IRQ_WDOG2          59
#define MX51_IRQ_KPP            60
#define MX51_IRQ_PWM1           61
#define MX51_IRQ_I2C1           62
#define MX51_IRQ_I2C2           63
#define MX51_IRQ_HS_I2C         64
#define MX51_IRQ_SIM_1          67
#define MX51_IRQ_SIM_2          68
#define MX51_IRQ_IIM            69
#define MX51_IRQ_PATA           70
#define MX51_IRQ_CCM_1          71
#define MX51_IRQ_CCM_2          72
#define MX51_IRQ_GPC_1          73
#define MX51_IRQ_GPC_2          74
#define MX51_IRQ_SRC            75
#define MX51_IRQ_TIGERP_1       76
#define MX51_IRQ_TIGERP_2       77
#define MX51_IRQ_TIGERP_3       78
#define MX51_IRQ_TIGERP_4       79
#define MX51_IRQ_TIGERP_5       80
#define MX51_IRQ_GPU2D          84
#define MX51_IRQ_GPU2D_BUSY     85
#define MX51_IRQ_FEC            87
#define MX51_IRQ_OWIRE          88
#define MX51_IRQ_TIGERP_6       89
#define MX51_IRQ_SJC            90
#define MX51_IRQ_SPDIF          91
#define MX51_IRQ_TVE            92
#define MX51_IRQ_FIRI           93
#define MX51_IRQ_PWM2           94
#define MX51_IRQ_SSI3           96
#define MX51_IRQ_EMI_BOOT       97
#define MX51_IRQ_TIGERP_7       98
#define MX51_IRQ_VPU            100
#define MX51_IRQ_EMI_COMPLETE   101
#define MX51_IRQ_GPU3D          102

#endif /* MX51_TZIC_H_ */
