/*
    Copyright © 2023, The AROS Development Team. All rights reserved.
    $Id$

    Desc: atomic operations for risc-v processors
    Lang: english
*/

#ifndef AROS_RISCV_ATOMIC_H
#define AROS_RISCV_ATOMIC_H

#define __AROS_ATOMIC_INC_B(var)
#define __AROS_ATOMIC_INC_W(var)
#define __AROS_ATOMIC_INC_L(var)
#define __AROS_ATOMIC_DEC_B(var)
#define __AROS_ATOMIC_DEC_W(var)
#define __AROS_ATOMIC_DEC_L(var)
#define __AROS_ATOMIC_AND_B(var, mask)
#define __AROS_ATOMIC_AND_W(var, mask)
#define __AROS_ATOMIC_AND_L(var, mask)
#define __AROS_ATOMIC_OR_B(var, mask)
#define __AROS_ATOMIC_OR_W(var, mask)
#define __AROS_ATOMIC_OR_L(var, mask)

#endif /* AROS_RISCV_ATOMIC_H */
